Global and China Next-generation Zonal Communication Network Topology and Chip Industry Research Report 2024 Featuring 7 International and 9 Chinese Automotive Communication Chip Enterprises - ResearchAndMarkets.com
DUBLIN--(BUSINESS WIRE)--Sep 23, 2024--
The "Next-generation Zonal Communication Network Topology and Chip Industry Research Report, 2024" report has been added to ResearchAndMarkets.com's offering.
How to build the next-generation in-vehicle communication architecture under the Zonal architecture?
In next-generation Zonal architecture, after realizing functional centralization, the number of ECUs in the car will be greatly reduced. Functional centralization is mainly guided by software algorithms, but to be truly implemented, it must rely on physical hardware such as controller, SoC, communication chip, and power chip in zonal controller and central computing platform to support it.
Communication requirements of cross-domain integration + Zonal architecture for in-vehicle backbone network
XPeng Motors X-EEA3. 0: The central supercomputer C-DCU integrates cockpit, partial vehicle body, central gateway and other functions. In the communication of this central supercomputer, C-DCU contains one Automotive Ethernet switch to support TSN, which is connected to XPU and 5G smart antenna through 2 channels of Gigabit Ethernet 1000Base-T1. It also contains 6 channels of 100M Ethernet, 2 of which are connected to the left and right Zonal controllers (LDCU, RDCU). MCUs of central computing platform and two zonal controllers are all Renesas' third-generation 28nm high-speed MCUs.
Changan Auto SDV ring network: Changan Auto's SDV ring network: Changan Auto SDA architecture consists of C2 (central computer: computing power 508TOPS) + EDC (experience data computer: computing power 2000GFLOPS) + three zonal controllers VIU. The architecture adopts vehicle Ethernet ring network communication technology, with 100M Ethernet as the backbone network. C2 and EDC communicate through Gigabit Ethernet. At the same time, TSN, ring network redundancy and other technologies are applied to solve the problems of disordered data transmission and packet loss in traditional Ethernet.
Communication requirements of next-generation central computing + Zonal architecture for in-vehicle backbone network
In the next-generation central computing + Zonal architecture, Zonal controller will generally integrate Zonal gateways, high-speed communication MCUs, vehicle Ethernet switch chips, Ethernet PHY chips and other communication-related chip devices. Each Zonal gateway contains an Ethernet switch, and a car may need 6-7 chips.
Some typical solutions under Zonal architecture:
High-speed communication MCU (NXP): In March 2024, NXP launched the world's first 5nm automotive MCU, the S32N55, which integrates vehicle dynamic control, body, comfort, and central gateway, and has multiple network interfaces, including CAN, LIN, FlexRay, automotive Ethernet, CAN-FD, CAN-XL, and PCIe, with at least 15 CAN network interfaces.
In the future, considering the demand for data transmission in autonomous driving and requirements for functional safety in the vehicle, the large amount of data transmission migration between central and zonal controllers, and the interaction of software algorithms, 10G+ automotive Ethernet may become the data backbone link in Zonal architecture.
Inter-chip interconnection becomes the key to communication in HPC central computing platform
Central computing platform is the core part of Zonal architecture. Since all systems that require a certain scale of computing resources, such as intelligent driving, intelligent cockpit, and vehicle control, will be concentrated in a central computing unit, multiple processors or SoCs will be used, which puts high demands on the computing power, interface, data security, functional safety and many other aspects of central computing platform's hardware architecture. The central computing platform is a heterogeneous chip integrated design of CPU+GPU, and communication technologies such as inter-board interconnection, inter-chip interconnection, and on-chip interconnection are key. Therefore, under Zonal architecture, automotive network also faces an important challenge, which is the high-performance computing interconnection of central computing platform itself.
In heterogeneous computing architecture, GPU and CPU are usually connected together through PCIe bus to work together. Currently, there are two major automotive-grade PCIe switch manufacturers on the market, one is Microchip, which focuses on mid-to-high-end products, and the other is PERICOM, which was acquired by Renesas and focuses on the low-end market and does not support NTB.
During foundation model training, the full potential of high-end graphics card clusters depends on whether each GPU in the GPU server cluster can communicate quickly and smoothly. In a multi-GPU system, the bandwidth of inter-GPU communication is usually above hundreds of GB/s. Data transmission rate of PCIe bus can easily become a bottleneck, and the serial-to-parallel conversion of PCIe link interface will produce a large delay, affecting efficiency and performance of GPU parallel computing.
Thus, NVIDIA launched NVLink technology that can improve communication between GPUs. NVLink is used in SoCs, and the in-vehicle computing platform NVIDIA DRIVE Thor integrates many intelligent functions such as digital dashboard panel, in-vehicle infotainment, autonomous driving, parking, etc. into a single architecture. In March 2024, NVIDIA launched the fifth-generation NVLink, with a total bandwidth of up to 1. 8 TB/s, which is more than14 times that of PCIe 5. 0. A single NVLink Switch chip has 50 billion transistors and supports seamless high-speed communication between up to 576 GPUs, which is suitable for complex large language models.
NVIDIA Blackwell architecture is based on the fifth-generation NVLink technology and is designed for Transformer, Large Language Model (LLM) and generative AI workloads. It can be divided into B200 and GB200 product series. The GB200 GPU integrates one Grace CPU and two B200 GPUs. Compared with the H100 Tensor Core GPU with NVLink 4, the GB200 NVL72 can provide 30 times the performance improvement for Large Language Model (LLM) inference loads, and reduce the cost and energy consumption of building and running real-time generative AI large language models on trillions of parameters to one-twenty-fifth of the previous level.
In March 2024, NVIDIA announced an expansion of its cooperation with BYD. BYD's future electric vehicles will be equipped with NVIDIA's next-generation autonomous vehicle processor DRIVE Thor using the Blackwell architecture. DRIVE Thor is expected to start mass production as early as 2025, with a performance of up to 1000 TFLOPS. In addition, BYD will also use NVIDIA's AI infrastructure for autonomous driving model training, and smart factory robots will also use the NVIDIA Isaac robot system.
Key Topics Covered:
1 Automotive Communication Network Architecture
1.1 Automotive Network Communication BUS
1.2 OEMs' Network Architecture
1.3 Communication Requirements in Zonal Architecture
1.4 How to Build Communication Architecture with Zonal Architecture Evolution?
2 In-car Backbone and Local Network Communication
2.1 In-car Bus Network Communication Standards & Protocols
2.2 Automotive Backbone Network Communication - 100M/1000M Ethernet
2.3 Automotive Local Network Communication - 10M Ethernet/CAN
2.4 Automotive Ethernet Transmission Media - Fiber Optics, POE Cables
2.5 Deployment Cases of Automotive Ethernet
2.6 Automotive Ethernet Chip Cost and Market Analysis
2.7 Automotive Communication Protocol Conversion - Gateway
3 Automotive High-speed Video Streaming Transmission Link
3.1 Automotive High-speed Video Transmission Technology - SerDes
3.2 Automotive SerDes Interface Protocols: Public & Private Standards
3.3 Automotive SerDes Public Protocols
3.4 Vehicle SerDes Private Protocol
3.5 Integrated Deployment Case - Sensor Side
3.6 Integrated Deployment Case - Display Side
3.7 Automotive SerDes Chip Market Size and Competition Landscape
4 Research on Inter-chip Communication
4.1 PCIe
4.2 NVLink
4.2.1 NVLink Technical Background
4.2.2 NVLink Technical Specifications
4.2.3 5th generation NVLink
4.2.4 NVLink High Speed Interconnect
4.2.5 NVLink Technology Carrier
4.2.6 Nvidia's GB200 GPU for AI and HPC Applications
4.2.7 BYD will carry NVLink 5-based DRIVE Thor
4.2.8 UALink Promotion Group was Established to Compete with NVLink
5 Research on Wireless Communication Inside and Outside Vehicles
5.1 Vehicle Wireless Communication Technology Standards and Specifications
5.2 Research on Main Application Scenarios of Wireless Communication Inside and Outside Vehicle
6 (Application Scenarios) Communication Research
6.1 Intelligent driving Scenario Communication
6.2 Intelligent Cockpit Scenario Communication
6.3 Vehicle Control Domain Communication
7 Research on Foreign Automotive Communication Chip Enterprises
7.1 Marvell
7.2 NXP
7.3 Broadcom
7.4 Microchip
7.5 TI
7.6 ADI
7.7 ROHM
8 Research on Domestic Vehicle Communication Chip Enterprises
8.1 Rsemi
8.2 Motorcomm
8.3 JLSemi
8.4 Realtek
8.5 SIT
8.6 Guoke Tianxun
8.7 Beijing Neuron Network Technology Co., Ltd.
8.8 Kungao Micro
8.9 Ingenic
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